Recent developments in portable personal computer technology have generated a large demand for low power integrated circuits. Such low power circuits typically have a supply voltage of 3.3 volts with a tolerance of +/-0.3 volts. The utilization of low power integrated circuits within portable systems provides advantages such as reduced consumption and lower battery life. However, selected conventional 5 volt integrated circuits provide performance advantages over low power 3.3 volt integrated circuits. Therefore, it is desirable to utilize both 5 volt integrated circuits and 3.3 volt integrated circuits within a single personal computer system.
However, several problems may arise when 3.3 volt and 5 volt integrated circuits are utilized within a single device. More specifically, 3.3 volt integrated circuits usually have a thin MOS gate oxide compared with 5 volt integrated circuits (e.g., 70 angstroms versus 90 angstroms). The MOS gate oxide of 3.3 volt circuits may become leaky when a 5 volt input signal is applied to it. The MOS gate oxide may become leaky due to tunneling effect or time-dependent dielectric breakdown (TDDB) effect. The gate oxide might also be permanently damaged if the electric field in the oxide is larger than its breakdown voltage.
A mixed voltage buffer may be utilized intermediate mixed voltage logic circuits to provide circuit compatibility. Conventional mixed voltage buffers typically include a PMOS transistor to couple the 5 volt supply with the buffer output. However, leakage current may occur intermediate the 5 volt power supply and the buffer output via a parasitic junction diode of the PMOS transistor. Other reliability issues which may arise with the mixing of 3.3 volt and 5 volt integrated circuits include hot carrier effect and electromigration due to higher voltages.
A cascade output NMOS transistor may be utilized to protect an NMOS output transistor of the input/output buffer to eliminate or minimize many of the aforementioned design problems.
Other conventional designs further include biasing circuits for reducing voltage drops across 3.3 volt components in mixed voltage applications. However, these designs generally continually draw considerable amounts of current. Such designs have significant drawbacks inasmuch as numerous mixed voltage interfacing applications involve portable or otherwise battery powered computers wherein minimal current consumption is desired for maximum usage from the limited power source.
Other designs provide only for the generation of a 3.3 volt output signal. Such designs are incompatible for applications where 5 volt output signals are necessary inasmuch as internal components of the conventional devices are not designed to withstand the increased voltages. Such designs typically lack appropriate circuitry for maintaining voltage drops across internal components within an acceptable design range.